AFF1-62A – Dual Flip-Flop/Latch

The AFF-62A is a building block for implementing sequential logic in close proximity to analog or mixed-signal circuits.  The MCELL consists of 2 via-configurable, resettable latches with options to pass or invert the data and clock inputs.  Supply and ground rails are tied to the platform’s Analog VDD and VSS.

Through via programming, the AFF1-62A can create positive or negative edge triggered flip-flops (with or without asynchronous reset input).   For synchronization between analog and digital sections of a platform, it can also be used to latch control and data signals.   Its close proximity to combinatorial logic makes the AFF1-62A suitable for a variety of digital blocks including clock dividers, successive approximation registers and state machines.