ALOGIC1-62A – Combinatorial Logic MCell Base

ALOGIC-62A is a building block for generic 2- and 3-input logic VCell gates. The cell is comprised of 3 series NFETs (connected source to drain and width W=1.5um) and 3 series PFETs (connected source to drain and width W=3.1um).  All FETs use the minimum technology length of 0.35um and have shared gate connections between NFET-PFET pairs.

There are over 15 possible configurations of the ALOGIC-62A01, each with its own logic function, drive strength, and input/output count.  Both single and complementary outputs are available for some VCells.  More complex logic functions are possible using multiple MCells.

VCELL Table

Name # MCELLS Req Description
vBUF1-X1-62A 1 Buffer with x1 Output Drive
vBUF2-X2-62A 1 Buffer with x2 Output Drive
vDBUF1-X11-62A 1 Buffer with Differential Output
vINV1-X1-62A 1 Logic Inverter with x1 Output Drive
vINV2-X2-62A 1 Logic Inverter with x2 Output Drive
vINV3-X3-62A 1 Logic Inverter with x3 Output Drive
vAND1-2I1-62A 1 Two-Input AND Gate with x1 Output Drive
vNAND1-2I1-62A 1 Two-Input NAND Gate
vINVNAND1-2I1-62A 1 Two-Input NAND Gate with Inverted Input and x1 Output Drive
vOR1-2I1-62A 1 Two-Input OR Gate with x1 Output Drive
vNOR1-2I1-62A 1 Two-Input NOR Gate with x1 Output Drive
vINVNOR1-2I1-62A 1 Two-Input NOR Gate with Inverted Input and x1 Output Drive
vNAND2-3I1-62A 1 Three-Input NAND Gate with x1 Output Drive
vNAND2-3I1-62A 1 Three-Input NAND Gate with x1 Output Drive
vANDNOR-3I1-62A 1 3-input AND-NOR Logic Element