Index > Platforms

Platforms

Platforms are non-configured IC die that contain a set of Fixed and Configurable Tiles, Collections of smaller circuit elements, and a metal interconnection “fabric”, where all processing steps are completed except for the via layers. By placing vias at key locations on the metal routing layer, a platform can be programmed to meeting specific application requirements. A design completed in this way is called a CVL Design (“Configured Via Layer” Design) for a given platform.

Platform
Analog VDD
Op Amps (S.E.)
[#amps(#tiles)]
Op Amps (Diff)
[#amps(#tiles)]
ADCs
(#,res,speed)
DACs
(#,res,speed)
Analog Logic Cells
Analog FF Cells
Analog I/0
Bandgap Tile
Bias Tile
PLL Tile
Digital Tiles
Digital VDD
Logic Gates
Flipflops
Digital I/O
Logic Tile SRAM
Fixed-Tile SRAM
Fixed-Tile EEPROM
uP Tile
VCA-6                                        
VCA-9                                        
Mocha-1 3.320 (12)16 (8)1, 10-bit, XX MSPS6, 6-bit, 100 MSPS
2, 10-bit, XX MSPS		53YesYes993.375,0001732 kbits (2-port)24k x 8 bits (2-port)32k x 8 bitsARM Cortex-M0
VCA-8                                        
VCA-7                                        
VCA-5 3.317 (6)76,500
VCA-2 15,750
VCA-1 3.328 (xx)6 (xx)-- 2, 10-bit, 1 MSPS42xx3.340,5007254 Kbits (1-port)--
VCA6101                                        
VCA-3 16,800
VCA-4 3.317 (10)4 (2)--3, 8-bit, 1 MSPS67810048YesYesYes193.320,5922,2883219 kbits (1-port)--4k x 16 bits--